Systolic processor for implementation of antenna arrays adaptation algorithm
DOI:
https://doi.org/10.1109/ICATT.1997.1235131Abstract
In this work synthesis of the systolic processor for rank-one modification of LDLT decomposition is realized. The synthesized systolic processor makes possible fast modification of LDLTfactorization according Cholesky (at the rate of input sample arrival from adaptive array elements) and demonstrates the possibility of obtaining effective task solution schemes appearing in building up STSP devices.References
Monzingo, R.A.; Miller, T.W. Introduction to Adaptive Arrays. NY.: Jons Wiley & Sons, 1980.
Glushankov, E.I.; Kolesnikov, A.N. The systolic processor synthesis for space signal processing algorithm implementation. Radiotekhnika, 1991, No. 4, p. 40-42.
Krasnov, S.A. The computational algorithm projection on systolic arrays. Computational Processes & Systems. Issue 5, Moscow: Science, 1987.
VLSI and Modem Signal Processing. Englewood Cliffs, NJ: Prentice-Hall, 1985 [ed. by S.Y. Kung, H.J. Whitehouse, and T. Kailath].
Published
1997-05-24
Issue
Section
AA, AAA, smart antennas and signal processing
